Components for Building Computers From Scratch/CPU-Z


QUESTION: I ran CPU-Z to get the specs on my PC and it is very good.

But I do not understand one thing.

It says my L2 is 256kB and it says my L3 is 3MB.

But when it tells me my L1 it says it like this

L1 Data 32 kB then right under it says L1 INST. 32 kB/

What are these two things?

ANSWER: That's reporting the size of the various caches on your CPU. The different levels (L1, L2, etc) represent the cache's position in the hierarchy - L1 being the highest, and L3 being the lowest (L1 is closest to the CPU). The L1 cache is divided between data and instruction - data being the data the CPU is working on, and instruction stores the instruction set its using.

Here's an explanation from CPU World that may also help:

And a much longer and more detailed article from Wikipedia:

The cache sizes will be dictated by the specific CPU and its architecture - generally higher performance (and multi-core) models will carry relatively larger and more caches to help improve performance (you'll often find these chips in workstations, servers, and supercomputers), while more standard models (what you'll likely find in most desktop and laptop computers) will carry relatively smaller and less caches to keep costs and power consumption (and therefore heat) at more reasonable levels. With modern systems CPU cache is not a user-upgradeable component; it's on-die with the CPU's core(s) and what you see is what you get. A new CPU may have more or less cache, depending on its specification and design goals.


---------- FOLLOW-UP ----------

QUESTION: Thank you for getting back to me.

Let me see if I understand you.

CPU-Z tells me

L1 Data 32 kB
L1 INST. 32 kB

So the L1 Data 32 kB is how mutch Data it is working on in the Level One Cache.
And L1 INSTR. 32 kB is the instructions in Level One Cache.

But when it tells me about L2 and L3 it just gives the size not DATA or INSTR.

So is this because L1 is just used for working on Data in takes in and L2 and L3 are just to STORE DATA to be sent out?

No that isn't entirely accurate. The CPU has separated L1 caches based on its design (one for data and one for instructions), while it has a single L2 and single L3 cache. The lower-tier caches are not just "output" either - they are just lower in the hierarchy (larger and slower).

Perhaps this link will provide further explanation:


Components for Building Computers From Scratch

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