Electronics/Question on the operation of this circuit
I attempted to understand the circuit drawn in this file , page 11.
I understand how Hi and Low LEDs are controlled (before C3). But after C3, I am lost. I have a couple of questions, can you help me please ?
1. Q2 and Q3 which are between C2 and C3 are there for - impedance buffering - purpose. Is that correct ? If so, Q2 alone would be sufficient (Base-Emitter buffering). Why the need for Q3 ?
2. How does the circuit involving D3, D4, Q3, Q4 work ? are the transistors even biased ?
Thank you !
I can't offer any better description than that which is contained within the pdf document on page 3. The circuit operation is explained quite elegantly and precisely. Keep in mind this is a digital logic probe and is looking to see the pulses coming from a digital device under test.
Therefore, the transistor circuits are not biased such as would be in a class A linear amplifier but rather biased in a natural state of OFF or class C biasing. The incoming logic pulse going either way, high or low, overcome the bias voltage of diodes D3 and D4 which drives the transistors into saturation for long enough RC time constant period to light the LED indicator for the few milliseconds for its indication to the operator.
Suggest you go back to page three and study through its description of the circuit operation. It will become more clear to you I think.
Let me know if you need more.